(a) Field of the Invention
The present invention relates to a programmable input/output circuit connected to an input terminal or an output terminal of an integrated circuit (hereinafter referred briefly to as an "IC") such as a programmable logic device (hereinafter referred briefly to as an "PLD") and capable of programmably performing logical process input signals or output signals.
(b) Description of the Prior Art
As an IC with which a user realizes a logical function associated with an application to a highly integrated degree within reach, there has been used a PLD or the like.
The PLD includes a plurality of programmable logic elements, and further, in the PLD, outputs and inputs of the respective logic elements can be desirably connected to each other by programmable wirings.
In general, an input signal to this PLD from the outside is directly input into specified input terminals of programmable circuit portions (such as an AND plane) of the logic elements.
As an example of arrangement of the logic elements used in conventional PLD, there is one proposed in Japanese Patent Application Unexamined Publication No. 58722/1987. As shown in a block diagram in FIG. 12, this logic element is of such an arrangement that functional cells 102 for realizing a counter, a shift register and the like are placed after logic outputs of the programmable circuit portions (an AND plane 100 and OR planes 101). The input signal from the outside should be input into input terminals 103 of the AND plane 100 in this example as well.
However, the PLD in the above-described technique presents the following problems. (1) When the input process such as removal of a noise component included in the input signal is conducted, the AND plane 100 and the like should necessarily be used, whereby the efficiency of use of the logic element is lowered to a considerable extent. (2) The same use of the AND plane 100 and the like as described above makes the area of the circuit be increased and the working speed of the circuit be slow.